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Semiconductors

How silicon pulled from sand comes to compute — from the physics of matter to arithmetic units, memory, power and fabrication.

15chapters 23Foundations 4Paper walkthroughs 0Interactive

Work through a volume in order: textbook → foundations → papers → lab.

① Textbook

  1. 01Why Some Materials Conduct Electricity
  2. 02Doping — Adding Impurities on Purpose
  3. 03The pn Junction — Building a One-Way Street
  4. 04MOSFET — A Gate Opened by Voltage ★
  5. 05CMOS — Why It Sips Power ★
  6. 06From Logic Gates to Arithmetic Units ★
  7. 07Clocks and Synchronisation ★
  8. 08The Memory Hierarchy and the Memory Wall ★
  9. 09Scaling Laws and Their End ★
  10. 10The Physics of Power — Why Voltage Dominates ★
  11. 11How Chips Are Made — Wafer to Yield ★
  12. 12Chiplets and 3D Integration ★
  13. 13Moving Data Costs More Than Computing ★
  14. 14Number Formats and Quantisation ★
  15. 15Design Styles for Accelerators ★

② Foundations

Articles that assume nothing and build the ideas of the field, in order.

Device Physics

Bands, doping, pn junctions, MOSFET, CMOS

  1. MOSFETs from the Ground Up — A Sluice Gate Opened by Voltage, and the Reality of Leakage FREE
  2. Reading Chip Design as a Power Budget — The Physics of Leakage and Heat ★ MEMBER
  3. Band Theory from the Ground Up — Why It Had to Be Silicon FREE
  4. From FinFET to GAA — Why the Transistor Had to Go Vertical ★ MEMBER
  5. The Physics of NAND Flash — Remembering by Trapping Electrons ★ MEMBER

Computer Architecture

Logic, clocking, the memory hierarchy and the memory wall

  1. The Memory Wall from Scratch — Why Moving Data Costs More Than Computing ★ MEMBER
  2. Interconnects — How NVLink, PCIe, and Light Set the Limits of Scale ★ MEMBER

Scaling & Power

The end of Dennard scaling, the physics of power, the cost of moving data

  1. The Physics of Power — Why Lowering Voltage Pays So Much ★ MEMBER
  2. What Moore's Law Actually Says — What Ended, and What Is Still Going FREE
  3. The Economics of Chiplets — We Split Dies Because We Cannot Build Them Big ★ MEMBER
  4. Thermal Design from Scratch — The Wall in 3D Stacking Is Heat ★ MEMBER

Fabrication & Packaging

Wafers, lithography, yield, chiplets, 3D integration

  1. How Chips Are Made — From Wafer to Yield ★ MEMBER
  2. Advanced Packaging — How CoWoS and HBM Stacking Became the Bottleneck for AI ★ MEMBER
  3. EUV Lithography — The Madness of Making 13.5nm Light ★ MEMBER
  4. Yield and Design — DFM, the Art of Giving Something Up ★ MEMBER

Accelerators

Number formats, accelerator design styles, edge deployment

  1. How Numbers Are Represented — From FP32 to FP8 and INT4 FREE
  2. The Inference Chip Wars — Inside the Design Philosophies of Groq, Cerebras, and the LPU ★ MEMBER

Supply Chain

Materials, equipment, EDA and IP — who holds what upstream of the chip itself

  1. Mapping the Semiconductor Supply Chain — From Sand to Chip, Who Holds What FREE
  2. Upstream of Semiconductors — Wafers, Photoresist, and Specialty Gases ★ MEMBER
  3. Inside the Equipment Makers — What ASML, AMAT, TEL and Lam Actually Build ★ MEMBER
  4. EDA Tools from Scratch — Chips Are Written in Software ★ MEMBER
  5. IP Cores and the Fabless Model — How Arm Rules Silicon Without Making a Single Chip ★ MEMBER
  6. The Geopolitics of Chips — Export Controls and Supply Chain Rewiring, Explained Technically ★ MEMBER

③ Paper walkthroughs

Written from the papers themselves. Every piece links the paper page and its PDF.

  1. CPU Pipelines and Branch Prediction — The Factory Inside One Clock Tick ★ MEMBER arXiv:1801.01203
  2. Systolic Arrays — Building the Heart of the TPU From Scratch ★ MEMBER arXiv:1704.04760
  3. The GPU Memory Hierarchy — HBM, SRAM, Registers, and Why Movement Wins ★ MEMBER arXiv:2205.14135
  4. How AI Accelerators Are Designed — What Actually Separates GPUs, NPUs, and TPUs ★ MEMBER arXiv:1704.04760