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Yield and Design — DFM, the Art of Giving Something Up

A circuit can be correct in simulation and still fail to make money in volume. Defect density models and the clustering factor, design rules that restrict what shapes you may draw, redundancy that assumes breakage, and binning that turns one die into several products — the engineering of trading performance for yield, from first principles.

ModalitytextTaskhardware

Correct on paper, unbuildable in volume

Imagine a set of house plans. The structural math checks out. It meets the seismic code. On paper it is perfect. Then you take it to the site and discover that the crane's arm doesn't fit between those columns. The welders have to work at awkward angles, and out of ten houses a few need rework.

Being correct and being easy to build are different properties. In volume production, the second one is what shows up on the invoice.

Chips have the same split. A design that behaves correctly in circuit simulation and passes timing closure can go to the fab and come back with a worse-than-expected fraction of good parts. The reason is not mysterious: the simulator is looking at the shapes the designer drew, while what appears on the wafer is the shapes that exposure, development and etch were able to reproduce. Corners round off, line ends pull back, narrow features thin out, and features that sit too close together merge.

DFM (Design for Manufacturability) is the umbrella term for closing that gap from the design side. It comes down to a single trade: you give up some performance, some area, and some design freedom, and you buy yield with it. That is why it deserves to be called the art of giving something up. The phrase sounds defeatist, but in semiconductors yield translates almost directly into unit cost, so this particular concession is the profit.

You cannot price the concession without a defect model

To decide how much to give up, you first need a number for how much you lose by giving up nothing. That starting point is the defect density model.

Y=eAD0Y = e^{-A D_0}
(1)

YY is yield (the fraction of dies that come out good), AA is the area of one die in cm², and D0D_0 is the number of killer defects per unit area (defects/cm²). The product AD0A \cdot D_0 is the average number of defects landing on a single die, and eAD0e^{-A D_0} is the probability that not a single one lands. Yield, in this reading, is the chance of drawing one defect lottery ticket per unit of area and losing every draw. Grow the area and the good fraction falls exponentially, not proportionally. Where this expression comes from is covered in How Chips Are Made.

Now the interesting part. Real yield usually comes in higher than this formula predicts. The equation is too pessimistic.

The cause is that defects do not scatter evenly across a wafer. Particles arrive in clumps, certain tool positions scratch the same spot repeatedly, and film uniformity degrades at the wafer edge. Take the same 100 defects: spread one per die they kill 100 dies, but clustered five per die they kill only 20. Defects cluster — and the model that absorbs this, built on the negative binomial distribution, looks like this.

Y=(1+AD0α)αY = \left(1 + \frac{A D_0}{\alpha}\right)^{-\alpha}
(2)

The new symbol α\alpha is the clustering factor: one number describing how tightly defects bunch together. A smaller α\alpha means more clustering (so more good dies survive the same defect count), and as α\alpha grows, equation (2) converges on equation (1). Think of the Poisson form as the extreme case where nothing clusters at all. In practice a value of a few is fitted from measured data.

This distinction bites when you are sizing a large die. Use Poisson and you will be needlessly pessimistic about big parts; pick a conveniently small α\alpha and you can write an arbitrarily optimistic business plan. α\alpha is a number you extract from your line, not one you wish for.

And before you even choose a model, there is a split worth making. Yield is a product of two terms.

Y=Ysys×YranY = Y_{\text{sys}} \times Y_{\text{ran}}

YranY_{\text{ran}} is random yield — accidental failures from particles and contamination, and a function of area. YsysY_{\text{sys}} is systematic yield, set by how well the design and the process get along: repeatable failures that show up the same way on every wafer, such as one particular pattern shape always thinning, or one particular spacing always bridging.

DFM works mostly on the second term. You cannot design away random dust (other than by shrinking area), but you can erase a systematic failure by not drawing the shape that causes it. Early in a new process node systematic yield dominates; as the node matures, what remains is mostly the random part. Yield improvement in the field tends to walk that path in order.

FIG 1Read this curve backwards and you have yield. Area and process step count grow linearly while the good-part fraction gets shaved exponentially. Switch to the log axis and you can see how "0.1% lost per step" and "0.01% lost per step" end up in different worlds after a few hundred steps

Once you accept that the opponent is an exponential, a designer has exactly three moves: draw shapes that are hard to hit (design rules), build structures that survive a hit (redundancy), and sell the damaged parts as something else (binning). We'll take them in order.

The first thing to separate is the DRC (Design Rule Check) kind of rule — break it and it cannot be manufactured — from the DFM kind — you can break it and still ship, but following it raises yield. Violate the first and the tool stops with an error; violate the second and it passes. Errors versus scores. Which means t

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