Fabrication & Packaging
Wafers, lithography, yield, chiplets, 3D integration
01
·Fabrication & Packaging·★ MEMBER·9 min read
How Chips Are Made — From Wafer to Yield
Every GPU and phone processor starts as sand and passes through hundreds of printing steps. From the basic moves — lithography, etching, ion implantation — to the brute force of EUV and the yield math that makes big dies exponentially expensive, explained from zero.
02
·Fabrication & Packaging·★ MEMBER·10 min read
Advanced Packaging — How CoWoS and HBM Stacking Became the Bottleneck for AI
What limited the supply of AI accelerators was not leading-edge logic wafers but the step that puts several finished chips into one part. From the reticle limit and the exponential math of yield, through 2.5D interposers, HBM stacks and TSVs, to hybrid bonding and the bill that heat and warpage send back.
03
·Fabrication & Packaging·★ MEMBER·10 min read
EUV Lithography — The Madness of Making 13.5nm Light
Light at 13.5nm is absorbed by air and by every lens material there is. So why did the semiconductor industry build an entire industry around it? Tin plasma sources, optics with no lenses at all, and the cost arithmetic against multi-patterning — explained from zero.
04
·Fabrication & Packaging·★ MEMBER·11 min read
Yield and Design — DFM, the Art of Giving Something Up
A circuit can be correct in simulation and still fail to make money in volume. Defect density models and the clustering factor, design rules that restrict what shapes you may draw, redundancy that assumes breakage, and binning that turns one die into several products — the engineering of trading performance for yield, from first principles.