Supply Chain
Materials, equipment, EDA and IP — who holds what upstream of the chip itself
01
·Supply Chain·FREE·8 min read
Mapping the Semiconductor Supply Chain — From Sand to Chip, Who Holds What
One pass through the whole chain that makes a chip — design (EDA/IP), equipment, materials, foundry, OSAT — and why nearly every stage collapses to a handful of firms, read through two formulas: chain availability and HHI.
02
·Supply Chain·★ MEMBER·13 min read
Upstream of Semiconductors — Wafers, Photoresist, and Specialty Gases
How sand becomes silicon that is 99.999999999% pure, gets pulled out of a melt as one giant single crystal, and is coated with a film that dissolves where light hits it. From segregation in the Czochralski process to acid blur in chemically amplified resist — and why a handful of Japanese firms still own this layer.
03
·Supply Chain·★ MEMBER·9 min read
Inside the Equipment Makers — What ASML, AMAT, TEL and Lam Actually Build
Chip manufacturing is four actions repeated hundreds of times — deposit, print, etch, clean — and each action has its own machine and its own specialist vendor. After mapping steps to suppliers, two pieces of arithmetic explain why the tool business collapses into a handful of firms, and why ASML's EUV monopoly is really a bundle of irreplaceable component makers.
04
·Supply Chain·★ MEMBER·10 min read
EDA Tools from Scratch — Chips Are Written in Software
Nobody hand-places the tens of billions of transistors on a leading-edge chip. Designers write text (RTL), and software compiles it into physical geometry through synthesis, place-and-route, and verification. Here is that pipeline from zero, plus why Synopsys and Cadence became impossible to route around.
05
·Supply Chain·★ MEMBER·11 min read
IP Cores and the Fabless Model — How Arm Rules Silicon Without Making a Single Chip
Why a company that only sells blueprints ends up at the center of the chip industry. License fees versus royalties, the shipment volume where buying beats building, the three grades of IP (soft, hard, architectural), and what RISC-V actually made free — and what it did not.
06
·Supply Chain·★ MEMBER·9 min read
The Geopolitics of Chips — Export Controls and Supply Chain Rewiring, Explained Technically
Why chokepoints form exactly where they do, from three conditions: physics, fixed cost, and tacit knowledge. Covers the technical reason controls are written as numeric thresholds, the common-cause formula that kills dual sourcing, and the learning curve that sets how fast a substitute can arrive.