Inside the Equipment Makers — What ASML, AMAT, TEL and Lam Actually Build

Chip manufacturing is four actions repeated hundreds of times — deposit, print, etch, clean — and each action has its own machine and its own specialist vendor. After mapping steps to suppliers, two pieces of arithmetic explain why the tool business collapses into a handful of firms, and why ASML's EUV monopoly is really a bundle of irreplaceable component makers.

Not the print shop — the people who build the presses

Chips are not carved. They are printed. Which makes a fab a print shop, and raises the question this article is about: who builds the presses?

In most industries the factory outranks the machinery. Semiconductors invert that. The machine costs more than most factories, and the machine — not the factory — sets the limit of what can be built. A leading-edge scanner runs past $100 million per unit, contains hundreds of thousands of parts, and ships on dedicated freight aircraft. How fine a fab can print is capped by whichever tool it can buy that year. A design you cannot expose is not a product. That single fact is why so much leverage in this industry sits with the equipment vendors.

Where each player sits in the wider chain is drawn in The Semiconductor Supply Chain. This article zooms into one link of it.

A wafer only ever receives four kinds of treatment

"Several hundred process steps" sounds like several hundred different jobs. It is really four, repeated.

• Deposit — lay a uniform thin film across the wafer: metal, insulator or semiconductor, anywhere from a few nanometres to a few hundred
• Print (lithography) — coat with photoresist, expose the mask pattern with light, develop it, and you have a stencil marking what to remove and what to keep
• Etch — strip away only what the stencil leaves exposed, usually with plasma
• Finish — wash off debris and particles, and polish the surface back to flat

One pass through those four produces one layer of circuitry. Repeat for every wiring level: dozens of times, sometimes close to a hundred. The physics of each step lives in How a Chip Is Made. What matters here is that each of the four actions has a dedicated machine, and each machine has a different company behind it.

Mapping process steps to vendors

Laid out as a table, the industry map looks like this.

Notice how many names span several rows. Deposition and etch in particular share a foundation — vacuum chambers, plasma, gas delivery — so a company strong in one usually sells the other. Lithography is the exception: its foundation is ultra-precision optics and mechanics, and the roster changes completely.

The arithmetic of how many tools you need

Capacity planning for a fab starts by solving one division problem per step.

$M$ is the number of tools required, $W$ the wafers started per month, $n$ how many times a single wafer passes through this step (greater than one, because layers repeat), $H$ the operating hours per month, $\mathrm{WPH}$ the wafers one tool processes per hour, and $U$ its utilisation. In plain terms: total wafer-passes to get through, divided by what one tool can absorb.

That division explains the shape of the industry. Cleaning has an enormous $n$ — it brackets nearly every other step — so it wins on unit count. Lithography has a moderate $n$ but low $\mathrm{WPH}$ and a price per tool in another league, so it loses on unit count, wins on capital spend, and becomes the bottleneck. When people describe a fab's capacity by how many EUV scanners it owns, they are quoting the output of this formula.